feat : enable FPU in UCOS#44
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- add logic to stop measuring task cycles when ISR is entered - add logic to resume measuring task cycles when ISR is exited - add logic to avoid getting negative value for cycles in corner case of 32b timestamp overflow
feature: add ISR profiling support
Signed-off-by: Don Dominic <don.dominic@iontra.com>
feat: add ISR context check API
Add a new API to check if the task message queue is full or not. Signed-off-by: Don Dominic <don.dominic@iontra.com>
OSInitHook has a error check to make sure the M4F FPU is in correct mode. As such the FPU in STM32G4 M4F is in correct state on reset and this check will always pass. However making sure the error check stays active in the final binary could help catch issues in some other platforms
chore: add a volatile keyword to keep a error check in OSInitHook
-This commit contains changes for enabling interrupt(including timer interrupt) in uC-OS RISC V port. -Saving and restoring of registers during context switch (task to task, interrupt to task, task to interrupt) -Removed systick handler as we are directly calling OSTimeTick() from timer ISR. -Added comments in os_cpu_a.S file for better understanding of assembly line instruction. Signed-off-by: Gaurav <gaurav@iontra.com>
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This change enable the saving and restoring of FPU registers during context switch. [ISDK-60](https://iontra.atlassian.net/browse/ISDK-60) Signed-off-by: Gaurav <gaurav@iontra.com>
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Description
feat : enable FPU in UCOS
Jira Links
https://iontra.atlassian.net/browse/ISDK-60
Type of change
This change enable the saving and restoring of FPU
registers during context switch.
How Has This Been Tested?
TBD
Checklist: