Agilex hps load image from SD Card (#3150)

Modify bootrom to load FW PAYLOAD from SD card in Agilex7
Add IRQ for SD card in altera APU

Author: AngelaGonzalezMarino

corev_apu/altera/Makefile

@@ -52,7 +52,8 @@ all: create_project \
 	write_source_files \
 	write_timing_constraints \
 	generate_ips \
-	sta
+	sta \
+	rbf
 
 clean:
 	$(RM) -rf *.rpt *.chg smart.log *.htm *.eqn *.pin *.sof *.pof db incremental_db *.summary *.smsg *.jdi $(ASSIGNMENT_FILES)
@@ -164,12 +165,16 @@ sta: asm
 	@echo "Running Quartus Timing Analysis"
 	$(QUARTUS_PATH)quartus_sta $(PROJECT) --do_report_timing
 
+rbf: sta
+	@echo "Running Quartus Prime Programming File Generator"
+	$(QUARTUS_PATH)/quartus_pfg -c output_files/*.sof output_files/cva6-hps.rbf -o hps_path=u-boot-spl-dtb.hex
+
+
 clean:
 	@echo "Cleaning project files"
 	rm -f $(PROJECT).qsf $(PROJECT).qpf $(PROJECT).map.rpt $(PROJECT).fit.rpt $(PROJECT).asm.rpt $(PROJECT).sta.rpt
 	rm -f interconnect.qsys*
 	rm -f *.backup
-	rm -f *.hex
 	rm -f *.txt
 	rm -f *.ip
 	rm -f ip/board.info

corev_apu/altera/ip/hps_cva6_altera.tcl

@@ -1,12 +1,11 @@
-# Quartus Pro License required to use this file
 package require -exact qsys 24.1
 
 # create the system "system"
 proc do_create_system {} {
 	# create the system
 	create_system system
 	set_project_property BOARD {default}
-	set_project_property DEVICE {AGFB014R24A3E3V}
+	set_project_property DEVICE {AGFB014R24B2E2V}
 	set_project_property DEVICE_FAMILY {Agilex 7}
 	set_project_property HIDE_FROM_IP_CATALOG {false}
 	set_use_testbench_naming_pattern 0 {}
@@ -291,7 +290,7 @@ proc do_create_system {} {
 	set_component_parameter_value S2FINTERRUPT_I2CEMAC2_Enable {0}
 	set_component_parameter_value S2FINTERRUPT_L4TIMER_Enable {0}
 	set_component_parameter_value S2FINTERRUPT_NAND_Enable {0}
-	set_component_parameter_value S2FINTERRUPT_SDMMC_Enable {0}
+	set_component_parameter_value S2FINTERRUPT_SDMMC_Enable {1}
 	set_component_parameter_value S2FINTERRUPT_SPIM0_Enable {0}
 	set_component_parameter_value S2FINTERRUPT_SPIM1_Enable {0}
 	set_component_parameter_value S2FINTERRUPT_SPIS0_Enable {0}
@@ -362,6 +361,14 @@ proc do_create_system {} {
 	add_instantiation_interface_port hps_emif hps_emif_hps_to_emif hps_to_emif 4096 STD_LOGIC_VECTOR Output
 	add_instantiation_interface_port hps_emif hps_emif_emif_to_gp emif_to_gp 1 STD_LOGIC Input
 	add_instantiation_interface_port hps_emif hps_emif_gp_to_emif gp_to_emif 2 STD_LOGIC_VECTOR Output
+	add_instantiation_interface h2f_sdmmc_interrupt interrupt INPUT
+	set_instantiation_interface_parameter_value h2f_sdmmc_interrupt associatedAddressablePoint {}
+	set_instantiation_interface_parameter_value h2f_sdmmc_interrupt associatedClock {}
+	set_instantiation_interface_parameter_value h2f_sdmmc_interrupt associatedReset {}
+	set_instantiation_interface_parameter_value h2f_sdmmc_interrupt bridgedReceiverOffset {0}
+	set_instantiation_interface_parameter_value h2f_sdmmc_interrupt bridgesToReceiver {}
+	set_instantiation_interface_parameter_value h2f_sdmmc_interrupt irqScheme {NONE}
+	add_instantiation_interface_port h2f_sdmmc_interrupt s2f_sdmmc_irq irq 1 STD_LOGIC Output
 	add_instantiation_interface hps_io conduit INPUT
 	set_instantiation_interface_parameter_value hps_io associatedClock {}
 	set_instantiation_interface_parameter_value hps_io associatedReset {}
@@ -2455,6 +2462,7 @@ proc do_create_system {} {
 	set_connection_parameter_value system_intel_cache_coherency_translator.m0/hps.f2h_axi_slave slaveDataWidthSysInfo {-1}
 
 	# add the exports
+	set_interface_property hps_h2f_sdmmc_interrupt EXPORT_OF hps.h2f_sdmmc_interrupt
 	set_interface_property hps_hps_io EXPORT_OF hps.hps_io
 	set_interface_property h2f_reset EXPORT_OF hps.h2f_reset
 	set_interface_property hps_h2f_axi_clock EXPORT_OF hps.h2f_axi_clock

corev_apu/altera/src/cva6_altera.sv

@@ -829,7 +829,7 @@ cva6_peripherals #(
 //    .eth_mdio,
 //    .eth_mdc,
     .phy_tx_clk_i   ( phy_tx_clk                  ),
-    .sd_clk_i       ( sd_clk_sys                  ),
+    .sd_irq       ( sd_irq                  ),
 //    .spi_clk_o      ( spi_clk_o                   ),
 //    .spi_mosi       ( spi_mosi                    ),
 //    .spi_miso       ( spi_miso                    ),
@@ -876,6 +876,7 @@ logic [31:0] calbus_rdata, calbus_rdata1;
 logic [4095:0] calbus_seq_param_tbl, calbus_seq_param_tbl1;
 logic cal_success;
 logic ddr_amm_wait_request;
+logic sd_irq;
 
 assign ddr_amm_wait_request = ~ddr_amm_ready;
 
@@ -1198,6 +1199,7 @@ axi_dw_adapter  #(
    );
 
 system hps_minimal (
+        .hps_h2f_sdmmc_interrupt_irq(sd_irq), //  output,   width = 1
         .hps_hps_io_EMAC0_TX_CLK  (hps_emac0_TX_CLK),  								//  output,   width = 1,           hps_hps_io.EMAC0_TX_CLK
         .hps_hps_io_EMAC0_TXD0    (hps_emac0_TXD0),    								//  output,   width = 1,                     .EMAC0_TXD0
         .hps_hps_io_EMAC0_TXD1    (hps_emac0_TXD1),    								//  output,   width = 1,                     .EMAC0_TXD1

corev_apu/altera/src/cva6_altera_peripherals.sv

@@ -57,7 +57,7 @@ module cva6_peripherals #(
     input  logic       spi_miso        ,
     output logic       spi_ss          ,
     // SD Card
-    input  logic       sd_clk_i        ,
+    input  logic       sd_irq        ,
     output logic [7:0] leds_o          ,
     input  logic [7:0] dip_switches_i
 );
@@ -68,7 +68,8 @@ module cva6_peripherals #(
     logic [ariane_soc::NumSources-1:0] irq_sources;
 
     // Unused interrupt sources
-    assign irq_sources[ariane_soc::NumSources-1:7] = '0;
+    assign irq_sources[ariane_soc::NumSources-1:8] = '0;
+    assign irq_sources[7] = sd_irq;
 
     REG_BUS #(
         .ADDR_WIDTH ( 32 ),