Fix expansion ROM and bus timing bugs for multi-card emulation

[BrentRector]

Summary

Two latent bugs in the expansion ROM ownership logic that are exposed when multiple
emulated cards with C8 expansion ROM are active simultaneously, or when physical Apple II
cards with C8 ROMs share the CPLD bus.

Fix 1: INTC8ROM permanently blocking expansion ROM on Apple ][+

Files: hdl/memory/apple_memory.sv, boards/a2n20v2-Enhanced/hdl/memory/apple_memory.sv

On Apple ][+, the SLOTC3ROM soft switch doesn't exist (IIe-only) and defaults to 0. The
existing code unconditionally sets INTC8ROM=1 on every $C3xx access when SLOTC3ROM=0.
Since INTC8ROM=1 blocks io_strobe_n generation in the slotmaker framework, ALL
emulated cards' expansion ROM reads stop working — not just the card in slot 3.

This is latent because upstream slot 3 is typically empty. Any card assigned to slot 3 on a
][+ exposes the bug.

Fix: Add runtime ][+ vs IIe detection (is_iie flag). The IIe boot ROM writes to $C00x
soft switches within milliseconds of startup; a ][+ never does. Gate INTC8ROM with is_iie
and add missing else clause to clear INTC8ROM on non-C3 slot access (real IIe behavior).

Fix 2: SSC expansion ROM phi0 qualification and SLOTROM guard

File: hdl/ssc/super_serial_card.sv

Two issues in SSC's C8-space ownership logic:

1. Missing phi0 gate on C8S2: When other cards sharing the CPLD transition their rd_en_o
   from active to tristate, PCB bus transceiver glitches create address transients visible to
   the FPGA at 54 MHz. Without phi0 qualification, the SSC's $CFFF detection fires on these
   transients, spuriously clearing C8S2 mid-execution of the SSC expansion ROM.

2. Missing SLOTROM guard on ENA_C8S: Once C8S2 is set via $C2xx, the SSC responds to
   ALL $C800-$CFFF reads even when another slot should be active. On real hardware with
   per-slot bus transceivers this doesn't matter, but on the shared CPLD it causes bus
   contention.

Both bugs are latent because the SSC is the only upstream emulated card with C8 expansion ROM.
With only one C8-capable card, no other card's rd_en_o transitions create glitches, and stale
C8S2 never causes contention. Adding any second C8-capable card (emulated or physical) exposes
both bugs.

How Discovered

Found during Videx VideoTerm emulation development. Apple Pascal 1.3 boot hung
non-deterministically during SSC FINIT — the Videx card's bus transceiver transitions
cleared SSC's C8S2 mid-execution, and stale C8S2 caused the SSC to respond during
Videx's C8-space reads.

Test Plan

• Apple ][+ hardware test with emulated cards: SSC (slot 2), Videx (slot 3),
  Mockingboard (slot 4), SuperSprite (slot 7)
• Apple Pascal 1.3 boots 100% with all cards enabled
• PR#3 enters 80-column mode correctly (slot 3 access triggers INTC8ROM path)
• Original Videx VideoTerm Demo application runs correctly
• SSC expansion ROM accessible when SLOTROM=2, correctly inhibited for other slots