Getting many "Request Timed out" for ping

[srvedulageth]

Hi,

1. I am working on an SoC. All components are from OpenCores.
2. The processor is ZAP. The SoC has 1 UART, 1 Timer, 1 VIC and 1 EthMAC Core.
3. The FPGA board i am Validating on is xc7a100tcsg324-1.
4. I am seeing around 60% of Request Timed Out for ping.
5. I have two RAMs(Wishbone based), 16K code ram and 8K data ram for EthMAC. Both are Flop based. I am not using any BRAM
   or so which i believe FPGA provides.
6. This 8K is split as two 4Ks, 1 4K for Tx and another 4K for Rx. The max packet size is 1518.
   I have 8 RX buffers, each has 256 bytes. I am only testing PING. My driver supports only ARP and ICMP
   PING Sends two requests: ARP + ICMP
   I am getting around 40% replies. Also one more observation is if i wait for more time (you can specify timeout by using -w)
   i am getting more replies. IN Wireshark, i can see that replies are coming very fast.
7. Issues
   1. What can i do get more memory in this board?.
   2. What can i do to get clean 'PING' i.e. no timeouts.
8. I can provide all my source code. No issues.

Any help is greatly appreciated.

Thank you.

[stnolting]

What can i do get more memory in this board?.

Use external memory. Many FPGA boards already have some kind of S(D)RAM, so you just need to write a controller for that. Vivado also provides a flexible set of memory interface IPs that can be used for that.

What can i do to get clean 'PING' i.e. no timeouts.

I have no idea. You may want to contact the original author of Ethernet-IP via OpenCores.