SST 10.1.0 Has been released

[allevin]

SST 10.1.0 Released

SST v10.1.0 is now available and can be downloaded here

The SST 10.1.0 release contains several changes to the simulation core and its component/sub-component APIs. In addition, a number of performance and stability issues have been addressed allowing for reduced simulation times and better scalability.

A selection of the improvement highlights are:

SST-Core:

• Reduced partitioning overhead (#557)
• Fixed bug in random number generator UniformDistribution
• Fixed issue where ELI wouldn’t properly load with Intel compilers
• SST::Interfaces::SimpleMem now supports snooping L1 invalidations
• Bug fixes in BaseComponent::fatal() and BaseComponent::sst_assert()
• Improved parsing of parameters using Params::find_array, which will now parse a single item as well as an array.
• Added ability to query whether a SubComponent supports a specific API defined using SST_ELI_REGISTER_SUBCOMPONENT_API or SST_ELI_REGISTER_SUBCOMPONENT_DERIVED_API
• Added UnitAlgebra support for Python input files
• Clean up Python/C++ modules and fix bug when using Python 3.6/3.7
• Initial intrinsic updates to support running on aarch64
• Connecting a port to multiple links now produces a warning and will error in future releases

SST-Elements:

• Ariel can build without Pin present, although no built-in alternative exists yet
• Ariel supports printing its page translation tables
• Fixed incorrect network configuration in Ariel IvyBridge and SandyBridge examples
• Updated CramSim to use SST output/exit capability
• Fixed ELI documentation for Ember FFT3D
• Added new Ember N-to-M motif
• New Ember Python module
• Fix Firefly issue with how queues were handled in the MPI stack
• Fix unblock issue in Firefly with receive buffers
• Fix bug in Firefly scatter
• Added missing port declaration in Firefly
• Fixed bug in MemHierarchy MemoryController where memory size was not being enforced
• Fixed bug in MemHierarchy LLSC where a load miss didn't always set the atomic flag correctly
• Added summary cache hit/miss statistics to MemHierarchy caches
• In debug mode, the MemHierarchyInterface now performs access alignment checks
• Added support for snooping L1 invalidations through SST::Interfaces::SimpleMem
• MemHierarchy DirectoryController no longer allows multiple accesses to the same line in the same cycle
• Fixed issue in MemHierarchy cache event count statistics that double counted some retried events
• Fix bug in Merlin trafficgen where rank 0 saw a disproportionate amount of traffic
• Merlin topologies can now use different routing algorithms and VC counts for different VNs
• Merlin now includes a new beta Python module which provides enhanced features and configurability

SST-Macro:

• Documentation improvements
• Improved Python3 support
• Network model bug fixes
• Skeletonizing compiler wrapper improvements and bug fixes

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Current release information can be found here

We look forward to hearing your successes with the latest release!

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SST Research and Product Teams and all of our SST Collaborators!
Sandia National Laboratories, USA