@@ -7125,9 +7125,9 @@ test_simde_mm256_cvtpd_epi32(SIMDE_MUNIT_TEST_ARGS) {
71257125 #endif
71267126 #if !defined(SIMDE_FAST_CONVERSION_RANGE)
71277127 { simde_mm256_set_pd(
7128- HEDLEY_STATIC_CAST(simde_float64, HEDLEY_STATIC_CAST(int64_t, INT32_MAX) + 1),
7128+ HEDLEY_STATIC_CAST(simde_float64, HEDLEY_STATIC_CAST(int64_t, INT32_MAX) + 1),
71297129 HEDLEY_STATIC_CAST(simde_float64, HEDLEY_STATIC_CAST(int64_t, INT32_MAX) - 100),
7130- HEDLEY_STATIC_CAST(simde_float64, HEDLEY_STATIC_CAST(int64_t, INT32_MIN) - 1),
7130+ HEDLEY_STATIC_CAST(simde_float64, HEDLEY_STATIC_CAST(int64_t, INT32_MIN) - 1),
71317131 HEDLEY_STATIC_CAST(simde_float64, HEDLEY_STATIC_CAST(int64_t, INT32_MIN) + 100)),
71327132 simde_mm_set_epi32(
71337133 INT32_MIN, INT32_C(2147483547), INT32_MIN, -INT32_C(2147483548)) },
@@ -7218,9 +7218,9 @@ test_simde_mm256_cvtps_epi32(SIMDE_MUNIT_TEST_ARGS) {
72187218 #endif
72197219 #if !defined(SIMDE_FAST_CONVERSION_RANGE)
72207220 { simde_mm256_set_ps(
7221- HEDLEY_STATIC_CAST(simde_float32, HEDLEY_STATIC_CAST(int64_t, INT32_MAX) + 1),
7221+ HEDLEY_STATIC_CAST(simde_float32, HEDLEY_STATIC_CAST(int64_t, INT32_MAX) + 1),
72227222 HEDLEY_STATIC_CAST(simde_float32, HEDLEY_STATIC_CAST(int64_t, INT32_MAX) - 100),
7223- HEDLEY_STATIC_CAST(simde_float32, HEDLEY_STATIC_CAST(int64_t, INT32_MIN) - 1),
7223+ HEDLEY_STATIC_CAST(simde_float32, HEDLEY_STATIC_CAST(int64_t, INT32_MIN) - 1),
72247224 HEDLEY_STATIC_CAST(simde_float32, HEDLEY_STATIC_CAST(int64_t, INT32_MIN) + 100),
72257225 0.f, 0.f, 0.f, 0.f),
72267226 simde_mm256_set_epi32(
@@ -7436,7 +7436,20 @@ test_simde_mm256_cvttpd_epi32(SIMDE_MUNIT_TEST_ARGS) {
74367436 const struct {
74377437 simde__m256d a;
74387438 simde__m128i r;
7439- } test_vec[8] = {
7439+ } test_vec[] = {
7440+ #if !defined(SIMDE_FAST_NANS)
7441+ { simde_mm256_set_pd(SIMDE_MATH_NAN, -SIMDE_MATH_NAN, 0.0, 0.0),
7442+ simde_mm_set_epi32( INT32_MIN, INT32_MIN, 0, 0) },
7443+ #endif
7444+ #if !defined(SIMDE_FAST_CONVERSION_RANGE)
7445+ { simde_mm256_set_pd(
7446+ HEDLEY_STATIC_CAST(simde_float64, HEDLEY_STATIC_CAST(int64_t, INT32_MAX) + 1),
7447+ HEDLEY_STATIC_CAST(simde_float64, HEDLEY_STATIC_CAST(int64_t, INT32_MAX) - 100),
7448+ HEDLEY_STATIC_CAST(simde_float64, HEDLEY_STATIC_CAST(int64_t, INT32_MIN) - 1),
7449+ HEDLEY_STATIC_CAST(simde_float64, HEDLEY_STATIC_CAST(int64_t, INT32_MIN) + 100)),
7450+ simde_mm_set_epi32(
7451+ INT32_MIN, INT32_C(2147483547), INT32_MIN, -INT32_C(2147483548)) },
7452+ #endif
74407453 { simde_mm256_set_pd(SIMDE_FLOAT64_C( -175.82), SIMDE_FLOAT64_C( -91.19),
74417454 SIMDE_FLOAT64_C( -855.64), SIMDE_FLOAT64_C(-1000.00)),
74427455 simde_mm_set_epi32(INT32_C(-175), INT32_C( -91), INT32_C(-855), INT32_C(-1000)) },
@@ -7476,7 +7489,22 @@ test_simde_mm256_cvttps_epi32(SIMDE_MUNIT_TEST_ARGS) {
74767489 const struct {
74777490 simde__m256 a;
74787491 simde__m256i r;
7479- } test_vec[8] = {
7492+ } test_vec[] = {
7493+ #if !defined(SIMDE_FAST_NANS)
7494+ { simde_mm256_set_ps(SIMDE_MATH_NAN, -SIMDE_MATH_NAN, 0.f, 0.f, 0.f, 0.f, 0.f, 0.f),
7495+ simde_mm256_set_epi32( INT32_MIN, INT32_MIN, 0, 0, 0, 0, 0, 0) },
7496+ #endif
7497+ #if !defined(SIMDE_FAST_CONVERSION_RANGE)
7498+ { simde_mm256_set_ps(
7499+ HEDLEY_STATIC_CAST(simde_float32, HEDLEY_STATIC_CAST(int64_t, INT32_MAX) + 1),
7500+ HEDLEY_STATIC_CAST(simde_float32, HEDLEY_STATIC_CAST(int64_t, INT32_MAX) - 100),
7501+ HEDLEY_STATIC_CAST(simde_float32, HEDLEY_STATIC_CAST(int64_t, INT32_MIN) - 1),
7502+ HEDLEY_STATIC_CAST(simde_float32, HEDLEY_STATIC_CAST(int64_t, INT32_MIN) + 100),
7503+ 0.f, 0.f, 0.f, 0.f),
7504+ simde_mm256_set_epi32(
7505+ INT32_MIN, INT32_C(2147483520), INT32_MIN, -INT32_C(2147483520),
7506+ 0, 0, 0, 0) },
7507+ #endif
74807508 { simde_mm256_set_ps(SIMDE_FLOAT32_C( -135.75), SIMDE_FLOAT32_C( 534.39),
74817509 SIMDE_FLOAT32_C( -81.93), SIMDE_FLOAT32_C( -234.94),
74827510 SIMDE_FLOAT32_C( -390.94), SIMDE_FLOAT32_C( -625.05),
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