use_cast

Author: burrbull

CHANGELOG.md

@@ -7,6 +7,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 ## [Unreleased]
 
+- Don't cast fields with width 17-31
 - Make `generic.rs` generic
 - Change initial write value for registers with modifiedWriteValues
 - Update `clap` to 4.0, use `irx-config` instead of `clap_conf`

src/generate/generic.rs

@@ -4,6 +4,7 @@ use core::marker;
 pub trait RawReg:
     Copy
     + Default
+    + From<bool>
     + core::ops::BitOr<Output = Self>
     + core::ops::BitAnd<Output = Self>
     + core::ops::BitOrAssign
@@ -503,7 +504,6 @@ macro_rules! impl_bit_proxy {
         where
             REG: Writable + RegisterSpec<Ux = U>,
             U: RawReg,
-            U: From<bool>,
             FI: Into<bool>,
         {
             /// Writes bit to the field
@@ -533,8 +533,7 @@ bit_proxy!(BitWriter0T, Bit0T);
 impl<'a, U, REG, N, FI, const WI: u8, const OF: u8> FieldWriter<'a, U, REG, N, FI, WI, OF>
 where
     REG: Writable + RegisterSpec<Ux = U>,
-    U: RawReg,
-    N: Into<U>,
+    U: RawReg + From<N>,
     FI: Into<N>,
 {
     /// Writes raw bits to the field
@@ -545,7 +544,7 @@ where
     #[inline(always)]
     pub unsafe fn bits(self, value: N) -> &'a mut REG::Writer {
         self.w.bits &= !(U::mask::<WI>() << { OF });
-        self.w.bits |= (value.into() & U::mask::<WI>()) << { OF };
+        self.w.bits |= (U::from(value) & U::mask::<WI>()) << { OF };
         self.w
     }
     /// Writes `variant` to the field
@@ -557,15 +556,14 @@ where
 impl<'a, U, REG, N, FI, const WI: u8, const OF: u8> FieldWriterSafe<'a, U, REG, N, FI, WI, OF>
 where
     REG: Writable + RegisterSpec<Ux = U>,
-    U: RawReg,
-    N: Into<U>,
+    U: RawReg + From<N>,
     FI: Into<N>,
 {
     /// Writes raw bits to the field
     #[inline(always)]
     pub fn bits(self, value: N) -> &'a mut REG::Writer {
         self.w.bits &= !(U::mask::<WI>() << { OF });
-        self.w.bits |= (value.into() & U::mask::<WI>()) << { OF };
+        self.w.bits |= (U::from(value) & U::mask::<WI>()) << { OF };
         self.w
     }
     /// Writes `variant` to the field
@@ -587,7 +585,6 @@ impl<'a, U, REG, FI, const OF: u8> BitWriter<'a, U, REG, FI, OF>
 where
     REG: Writable + RegisterSpec<Ux = U>,
     U: RawReg,
-    U: From<bool>,
     FI: Into<bool>,
 {
     /// Sets the field bit
@@ -606,7 +603,6 @@ impl<'a, U, REG, FI, const OF: u8> BitWriter1S<'a, U, REG, FI, OF>
 where
     REG: Writable + RegisterSpec<Ux = U>,
     U: RawReg,
-    U: From<bool>,
     FI: Into<bool>,
 {
     /// Sets the field bit
@@ -620,7 +616,6 @@ impl<'a, U, REG, FI, const OF: u8> BitWriter0C<'a, U, REG, FI, OF>
 where
     REG: Writable + RegisterSpec<Ux = U>,
     U: RawReg,
-    U: From<bool>,
     FI: Into<bool>,
 {
     /// Clears the field bit
@@ -634,7 +629,6 @@ impl<'a, U, REG, FI, const OF: u8> BitWriter1C<'a, U, REG, FI, OF>
 where
     REG: Writable + RegisterSpec<Ux = U>,
     U: RawReg,
-    U: From<bool>,
     FI: Into<bool>,
 {
     ///Clears the field bit by passing one
@@ -648,7 +642,6 @@ impl<'a, U, REG, FI, const OF: u8> BitWriter0S<'a, U, REG, FI, OF>
 where
     REG: Writable + RegisterSpec<Ux = U>,
     U: RawReg,
-    U: From<bool>,
     FI: Into<bool>,
 {
     ///Sets the field bit by passing zero
@@ -662,7 +655,6 @@ impl<'a, U, REG, FI, const OF: u8> BitWriter1T<'a, U, REG, FI, OF>
 where
     REG: Writable + RegisterSpec<Ux = U>,
     U: RawReg,
-    U: From<bool>,
     FI: Into<bool>,
 {
     ///Toggle the field bit by passing one
@@ -676,7 +668,6 @@ impl<'a, U, REG, FI, const OF: u8> BitWriter0T<'a, U, REG, FI, OF>
 where
     REG: Writable + RegisterSpec<Ux = U>,
     U: RawReg,
-    U: From<bool>,
     FI: Into<bool>,
 {
     ///Toggle the field bit by passing zero

src/generate/register.rs

@@ -436,10 +436,15 @@ pub fn fields(
         let rv = properties.reset_value.map(|rv| (rv >> offset) & mask);
         let fty = width.to_ty()?;
 
-        let use_mask = if let Some(size) = properties.size {
-            size != width
+        let use_mask;
+        let use_cast;
+        if let Some(size) = properties.size {
+            let size = size.to_ty_width()?;
+            use_cast = size != width.to_ty_width()?;
+            use_mask = size != width;
         } else {
-            true
+            use_cast = true;
+            use_mask = true;
         };
 
         let mut lookup_results = Vec::new();
@@ -481,10 +486,14 @@ pub fn fields(
                 quote! {
                     ((self.bits >> #offset) & #hexmask) #cast
                 }
-            } else if use_mask {
+            } else if use_cast {
                 quote! {
                     (self.bits & #hexmask) #cast
                 }
+            } else if use_mask {
+                quote! {
+                    self.bits & #hexmask
+                }
             } else {
                 quote! {
                     self.bits
@@ -713,10 +722,14 @@ pub fn fields(
                         quote! {
                             ((self.bits >> #sub_offset) & #hexmask) #cast
                         }
-                    } else if use_mask {
+                    } else if use_cast {
                         quote! {
                             (self.bits & #hexmask) #cast
                         }
+                    } else if use_mask {
+                        quote! {
+                            self.bits & #hexmask
+                        }
                     } else {
                         quote! {
                             self.bits