Configuring External Clock Source with AntSDR E200

[smazokha]

0. Could you send email to xianjun.jiao@ugent.be to introduce your self?

Done!

1. Our image is used directly or you build your own image?

Using the default OpenWifi image on AntSDR E200

2. What is your own modification?

None

3. Versions: OS, Vivado, openwifi/openwifi-hw repo branch and commit revision

openwifi/openwifi-hw repo branch

4. Board/hardware type

Two AntSDR E200 boards with GPSDO clock source (Leo Bodnar's LBE-1420)

5. WiFi channel number

36th channel @ 5 GHz

6. Steps to reproduce the issue, and the related error message, screenshot, etc

I couldn't find a way to configure the use of external clock source, since OpenWiFi doesn't have support for the fw_setenv (or fw_printenv) commands similar to the PlutoSDR family of devices.

7. Describe your debug efforts by Linux native tools, such as tcpdump and "cat /proc/interrupts"

N/A

8. Describe your debug efforts by: https://github.com/open-sdr/openwifi/blob/master/doc/README.md#Debug-methods

N/A

9. Any other thing we need to know for helping you better?

N/A

[JiaoXianjun]

I received notification of your comments, but why it disappears?

UPD: from digging a little deeper into the E200's device tree file, it seems that the external clock has been enabled by default by the system.

I am referring to the adi,xo-disable-use-ext-refclk-enable parameter in the ad9361-phy section. However, there doesn't seem to be any way to verify whether the system actually locks to the external clocks, or whether it falls back to the internal one.

[JiaoXianjun]

Can give you some hints for you to further working on it. (not fully remember the exact info, only some clue).

If I remember correctly, you also have to tell ad9361 the frequency of the clock speed by devicetree? Because your external clock speed might not be the same as the one onboard (40MHz). (Try to find out the devicetree info by searching further of my last two items about the two boards). So you can use a non 40MHz external clock, and change the clock frequency in devicetree accordingly. It the clock is not switched to your external clock with different frequency, you should observe very bad performance, or strange output center frequency, or it does not work totally due to devicetree and physical clock mismatch.

You can try to find some "using external clock" topic info about fmcomms2 (like schematic). There you will find that you have to remove the onboard oscillator and add a coupling capacitor for external clock input. In this way, you ensure physically the usage of external clock.

You can also try to find the related information about "using external clock" about the SoM adrv9361z7035 or adrv9364z7020 (look at their schematic as well). The basic principle is the same. But that SoM offer a clock switch onboard, and the clock switch is controlled by some GPIO (controlled by some devicetree entry from AD9361?). You could measure the gpio control pin of that switch to confirm the clock source.