Skip to content

Commit 8699961

Browse files
committed
patina_bench: Misc tweaks
Signed-off-by: msdx321 <[email protected]>
1 parent 673f5d8 commit 8699961

12 files changed

Lines changed: 233 additions & 167 deletions

File tree

src/components/implementation/tests/bench_sched_yield/bench_sched_yield.c

Lines changed: 27 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -17,36 +17,47 @@
1717

1818
/* lo and hi is actually running at the same prio */
1919
#define ITERATION 10000
20-
/* #define PRINT_ALL */
20+
#define PRINT_ALL
2121

2222
thdid_t yield_hi = 0, yield_lo = 0;
23+
2324
volatile cycles_t start;
24-
volatile cycles_t end;
25+
volatile int count;
2526

2627
struct perfdata perf;
2728
cycles_t result[ITERATION] = {0, };
2829

2930
/***
30-
* We're measuring 2-way context switch time.
31+
* We're measuring one-way context switch time.
3132
*/
3233
void
3334
yield_hi_thd(void *d)
3435
{
35-
/* Never stops running; low priority controls how many iters to run. */
36-
while (1) {
36+
cycles_t end;
37+
38+
while (count < ITERATION) {
3739
debug("h1,");
40+
41+
start = time_now();
3842
sched_thd_yield_to(yield_lo);
43+
end = time_now();
44+
3945
debug("h2,");
46+
47+
perfdata_add(&perf, end - start);
48+
49+
count++;
4050
}
51+
52+
while (1) ;
4153
}
4254

4355
void
4456
yield_lo_thd(void *d)
4557
{
46-
int i;
47-
int first = 0;
58+
cycles_t end;
4859

49-
for (i = 0; i < ITERATION + 1; i++) {
60+
while (count < ITERATION) {
5061
debug("l1,");
5162

5263
start = time_now();
@@ -55,16 +66,16 @@ yield_lo_thd(void *d)
5566

5667
debug("l2,");
5768

58-
if (first == 0) first = 1;
59-
else perfdata_add(&perf, end - start);
69+
perfdata_add(&perf, end - start);
70+
71+
count++;
6072
}
6173

62-
perfdata_calc(&perf);
6374
#ifdef PRINT_ALL
64-
perfdata_all(&perf);
65-
#else
66-
perfdata_print(&perf);
75+
perfdata_raw(&perf);
6776
#endif
77+
perfdata_calc(&perf);
78+
perfdata_print(&perf);
6879

6980
while (1) ;
7081
}
@@ -77,6 +88,8 @@ test_yield(void)
7788
SCHED_PARAM_CONS(SCHEDP_PRIO, 6)
7889
};
7990

91+
count = 0;
92+
8093
perfdata_init(&perf, "Context switch time", result, ITERATION);
8194

8295
printc("Create threads:\n");

src/components/implementation/tests/bench_sl_yield/bench_sl_yield.c

Lines changed: 25 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -19,7 +19,7 @@
1919

2020
/* lo and hi is actually running at the same prio */
2121
#define ITERATION 10000
22-
/* #define PRINT_ALL */
22+
#define PRINT_ALL
2323

2424
/* Ensure this is the same as what is in sl_mod_fprr.c */
2525
#define SL_FPRR_NPRIOS 32
@@ -32,29 +32,40 @@ struct sl_thd *testing_thread;
3232
thdid_t thdid1, thdid2;
3333

3434
volatile cycles_t start;
35-
volatile cycles_t end;
35+
volatile int count;
3636

3737
struct perfdata perf;
3838
cycles_t result[ITERATION] = {0, };
3939

4040
static void
4141
thd1_fn()
4242
{
43-
/* Never stops running; low priority controls how many iters to run. */
44-
while (1) {
43+
cycles_t end;
44+
45+
while (count < ITERATION) {
4546
debug("h1,");
47+
48+
start = time_now();
4649
sl_thd_yield(thdid2);
50+
end = time_now();
51+
4752
debug("h2,");
53+
54+
perfdata_add(&perf, end - start);
55+
56+
count++;
4857
}
58+
59+
while (1);
4960
}
5061

5162
static void
5263
thd2_fn()
5364
{
5465
int i;
55-
int first = 0;
66+
cycles_t end;
5667

57-
for (i = 0; i < ITERATION + 1; i++) {
68+
while (count < ITERATION) {
5869
debug("l1,");
5970

6071
start = time_now();
@@ -63,16 +74,16 @@ thd2_fn()
6374

6475
debug("l2,");
6576

66-
if (first == 0) first = 1;
67-
else perfdata_add(&perf, end - start);
77+
perfdata_add(&perf, end - start);
78+
79+
count++;
6880
}
6981

70-
perfdata_calc(&perf);
7182
#ifdef PRINT_ALL
72-
perfdata_all(&perf);
73-
#else
74-
perfdata_print(&perf);
83+
perfdata_raw(&perf);
7584
#endif
85+
perfdata_calc(&perf);
86+
perfdata_print(&perf);
7687

7788
while (1) ;
7889
}
@@ -104,6 +115,8 @@ cos_init(void)
104115
struct cos_defcompinfo *defci = cos_defcompinfo_curr_get();
105116
struct cos_compinfo *ci = cos_compinfo_get(defci);
106117

118+
count = 0;
119+
107120
PRINTC("Thread switch benchmark for the scheduling library (sl)\n");
108121
cos_meminfo_init(&(ci->mi), BOOT_MEM_KM_BASE, COS_MEM_KERN_PA_SZ, BOOT_CAPTBL_SELF_UNTYPED_PT);
109122
cos_defcompinfo_init();

src/components/implementation/tests/patina_chan_bench/patina_chan_bench.c

Lines changed: 52 additions & 40 deletions
Original file line numberDiff line numberDiff line change
@@ -10,6 +10,20 @@
1010
#include <patina.h>
1111
#include <perfdata.h>
1212

13+
#define COLD_CACHE
14+
#ifdef COLD_CACHE
15+
#define cache_flush() __cache_flush()
16+
#define COLD_OFFSET 1
17+
#define COLD_INDEX 0
18+
#else
19+
#define cache_flush()
20+
#define COLD_OFFSET 0
21+
#define COLD_INDEX -1
22+
#endif
23+
24+
#define CACHE_SIZE 512 * 1024
25+
#define CACHE_LINE_SIZE 32
26+
1327
#undef PATINA_CHAN_TRACE_DEBUG
1428
#ifdef PATINA_CHAN_TRACE_DEBUG
1529
#define debug(format, ...) printc(format, ##__VA_ARGS__)
@@ -18,11 +32,14 @@
1832
#endif
1933

2034
/* One low-priority thread and one high-priority thread contends on the lock */
35+
#ifdef COLD_CACHE
36+
#define ITERATION 10 * 10
37+
#else
2138
#define ITERATION 10 * 1000
22-
#define PRINT_ALL
39+
#endif
40+
#undef PRINT_ALL
2341

2442
/* Two options are available: Sender at low/high prio, data words 4 */
25-
#undef READER_HIGH
2643
#define DATA_WORDS 2
2744

2845
thdid_t chan_reader = 0, chan_writer = 0;
@@ -60,6 +77,20 @@ patina_chan_r_t rid2;
6077
patina_chan_s_t sid;
6178
patina_chan_s_t sid2;
6279

80+
volatile char pool[CACHE_SIZE * 4] = {
81+
0,
82+
};
83+
84+
void
85+
__cache_flush()
86+
{
87+
int agg = 1;
88+
for (int i = 0; i < CACHE_SIZE * 4; i += CACHE_LINE_SIZE) {
89+
pool[i] += agg;
90+
agg = pool[i];
91+
}
92+
}
93+
6394
/***
6495
* The two threads reciprocally sends and receives.
6596
*/
@@ -84,10 +115,10 @@ void
84115
chan_writer_thd(void *d)
85116
{
86117
int i;
87-
int first = 0;
88118

89-
for (int i = 0; i < ITERATION + 1; i++) {
119+
for (int i = 0; i < ITERATION + COLD_OFFSET; i++) {
90120
debug("w1,");
121+
cache_flush();
91122
ts1[0] = time_now();
92123
debug("ts1: %d,", ts1[0]);
93124
debug("w2,");
@@ -99,35 +130,25 @@ chan_writer_thd(void *d)
99130
ts3[0] = time_now();
100131
debug("w5,");
101132

102-
if (first == 0)
103-
first = 1;
104-
else {
105-
if (ts2[0] > ts1[0] && ts3[0] > ts2[0]) {
106-
perfdata_add(&perf1, ts2[0] - ts1[0]);
107-
perfdata_add(&perf2, ts3[0] - ts2[0]);
108-
perfdata_add(&perf3, ts3[0] - ts1[0]);
109-
}
133+
if (ts2[0] > ts1[0] && ts3[0] > ts2[0] && i != COLD_INDEX) {
134+
perfdata_add(&perf1, ts2[0] - ts1[0]);
135+
perfdata_add(&perf2, ts3[0] - ts2[0]);
136+
perfdata_add(&perf3, ts3[0] - ts1[0]);
110137
}
111138
}
112139

140+
#ifdef PRINT_ALL
141+
perfdata_raw(&perf1);
142+
perfdata_raw(&perf2);
143+
perfdata_raw(&perf3);
144+
#endif
113145
perfdata_calc(&perf1);
114146
perfdata_calc(&perf2);
115147
perfdata_calc(&perf3);
116-
#ifdef PRINT_ALL
117-
#ifdef READER_HIGH
118-
perfdata_all(&perf1);
119-
#else
120-
perfdata_all(&perf2);
121-
#endif
122-
perfdata_all(&perf3);
123-
#else
124-
#ifdef READER_HIGH
148+
125149
perfdata_print(&perf1);
126-
#else
127150
perfdata_print(&perf2);
128-
#endif
129151
perfdata_print(&perf3);
130-
#endif
131152

132153
while (1)
133154
;
@@ -137,18 +158,13 @@ void
137158
test_chan(void)
138159
{
139160
int i;
140-
int first = 0;
141161
cycles_t begin, end;
142162

143-
#ifdef READER_HIGH
144163
sched_param_t sps[] = {SCHED_PARAM_CONS(SCHEDP_PRIO, 4), SCHED_PARAM_CONS(SCHEDP_PRIO, 6)};
145-
#else
146-
sched_param_t sps[] = {SCHED_PARAM_CONS(SCHEDP_PRIO, 6), SCHED_PARAM_CONS(SCHEDP_PRIO, 4)};
147-
#endif
148164

149165
/* Uncontended lock taking/releasing */
150166
perfdata_init(&perf1, "Uncontended channel - selfloop", result1, ITERATION);
151-
for (i = 0; i < ITERATION + 1; i++) {
167+
for (i = 0; i < ITERATION; i++) {
152168
begin = time_now();
153169

154170
debug("send\n");
@@ -157,17 +173,13 @@ test_chan(void)
157173
patina_channel_recv(rid, tmp, 1, 0);
158174

159175
end = time_now();
160-
if (first == 0)
161-
first = 1;
162-
else
163-
perfdata_add(&perf1, end - begin);
176+
perfdata_add(&perf1, end - begin);
164177
}
165-
perfdata_calc(&perf1);
166178
#ifdef PRINT_ALL
167-
perfdata_all(&perf1);
168-
#else
169-
perfdata_print(&perf1);
179+
perfdata_raw(&perf1);
170180
#endif
181+
perfdata_calc(&perf1);
182+
perfdata_print(&perf1);
171183

172184
perfdata_init(&perf1, "Contended channel - reader high use this", result1, ITERATION);
173185
perfdata_init(&perf2, "Contended channel - writer high use this", result2, ITERATION);
@@ -176,11 +188,11 @@ test_chan(void)
176188
printc("Create threads:\n");
177189

178190
chan_reader = sched_thd_create(chan_reader_thd, NULL);
179-
printc("\tcreating reader thread %d at prio %d\n", chan_reader, sps[0]);
191+
printc("\tcreating reader thread %d at prio %d\n", chan_reader, sps[1]);
180192
sched_thd_param_set(chan_reader, sps[0]);
181193

182194
chan_writer = sched_thd_create(chan_writer_thd, NULL);
183-
printc("\tcreating writer thread %d at prio %d\n", chan_writer, sps[1]);
195+
printc("\tcreating writer thread %d at prio %d\n", chan_writer, sps[0]);
184196
sched_thd_param_set(chan_writer, sps[1]);
185197
}
186198

src/components/implementation/tests/patina_chan_bench_inter_recv/patina_chan_bench_inter_recv.c

Lines changed: 1 addition & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -22,19 +22,13 @@ patina_chan_r_t rid;
2222
patina_event_t evt;
2323

2424
/* Keep these settings below consistent with the sender side */
25-
#undef READER_HIGH
26-
#define USE_EVTMGR
25+
#undef USE_EVTMGR
2726

2827
#define TEST_CHAN_ITEM_SZ sizeof(u32_t)
2928
#define TEST_CHAN_NSLOTS 2
3029
#define TEST_CHAN_SEND_ID 3
3130
#define TEST_CHAN_RECV_ID 4
32-
/* We are the receiver, and we don't care about data gathering */
33-
#ifdef READER_HIGH
3431
#define TEST_CHAN_PRIO_SELF 4
35-
#else
36-
#define TEST_CHAN_PRIO_SELF 5
37-
#endif
3832

3933
typedef unsigned int cycles_32_t;
4034

0 commit comments

Comments
 (0)