[Xtensa] Fix i8/i16 ABI alignment.

Set 32-bit alignmnet for i8 and i16 types.

Author: andreisfr

clang/lib/Basic/Targets/Xtensa.h

@@ -50,7 +50,7 @@ class LLVM_LIBRARY_VISIBILITY XtensaTargetInfo : public TargetInfo {
     WIntType = UnsignedInt;
     UseZeroLengthBitfieldAlignment = true;
     MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 32;
-    resetDataLayout("e-m:e-p:32:32-i8:8:32-i16:16:32-i64:64-i128:128-n32");
+    resetDataLayout("e-m:e-p:32:32-i64:64-i128:128-n32");
   }
 
   void getTargetDefines(const LangOptions &Opts,

llvm/lib/Target/Xtensa/XtensaISelLowering.cpp

@@ -732,7 +732,14 @@ static bool CC_Xtensa_Custom(unsigned ValNo, MVT ValVT, MVT LocVT,
 
   if (ArgFlags.isByVal()) {
     Align ByValAlign = ArgFlags.getNonZeroByValAlign();
-    unsigned Offset = State.AllocateStack(ArgFlags.getByValSize(), ByValAlign);
+    unsigned ByValSize = ArgFlags.getByValSize();
+    if (ByValSize < 4) {
+      ByValSize = 4;
+    }
+    if (ByValAlign < Align(4)) {
+      ByValAlign = Align(4);
+    }
+    unsigned Offset = State.AllocateStack(ByValSize, ByValAlign);
     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset, LocVT, LocInfo));
     // Allocate rest of registers, because rest part is not used to pass
     // arguments

llvm/lib/Target/Xtensa/XtensaTargetMachine.cpp

@@ -36,7 +36,7 @@ extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeXtensaTarget() {
 static std::string computeDataLayout(const Triple &TT, StringRef CPU,
                                      const TargetOptions &Options,
                                      bool IsLittle) {
-  std::string Ret = "e-m:e-p:32:32-i8:8:32-i16:16:32-i64:64-i128:128-n32";
+  std::string Ret = "e-m:e-p:32:32-i64:64-i128:128-n32";
   return Ret;
 }