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[Xtensa] Fix lowering funnel shift left.
1 parent 9b553d7 commit 7c941f4

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2 files changed

+9
-7
lines changed

2 files changed

+9
-7
lines changed

llvm/lib/Target/Xtensa/XtensaISelLowering.cpp

Lines changed: 8 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1793,12 +1793,16 @@ SDValue XtensaTargetLowering::LowerFunnelShift(SDValue Op,
17931793
bool IsFSHR = Op.getOpcode() == ISD::FSHR;
17941794
assert((VT == MVT::i32) && "Unexpected funnel shift type!");
17951795

1796+
SDValue SetSAR;
1797+
17961798
if (!IsFSHR) {
1797-
Shamt = DAG.getNode(ISD::SUB, DL, MVT::i32,
1798-
DAG.getConstant(32, DL, MVT::i32), Shamt);
1799+
SetSAR = DAG.getNode(XtensaISD::SSL, DL,
1800+
MVT::Glue, Shamt);
1801+
} else {
1802+
SetSAR = DAG.getNode(XtensaISD::SSR, DL,
1803+
MVT::Glue, Shamt);
17991804
}
1800-
SDValue SetSAR = DAG.getNode(XtensaISD::SSR, DL,
1801-
MVT::Glue, Shamt);
1805+
18021806
return DAG.getNode(XtensaISD::SRC, DL, VT, Op0, Op1, SetSAR);
18031807
}
18041808

llvm/test/CodeGen/Xtensa/funnel-shift.ll

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -11,9 +11,7 @@ entry:
1111

1212
define dso_local i32 @test_fshl(i32 %value1, i32 %value2, i32 %shift) nounwind {
1313
; CHECK-LABEL: @test_fshl
14-
; CHECK: movi.n a8, 32
15-
; CHECK: sub a8, a8, a4
16-
; CHECK: ssr a8
14+
; CHECK: ssl a4
1715
; CHECK: src a2, a2, a3
1816
entry:
1917
%0 = tail call i32 @llvm.fshl.i32(i32 %value1, i32 %value2, i32 %shift)

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