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| 1 | +; RUN: llc -mtriple=xtensa -mcpu=esp32 -verify-machineinstrs < %s \ |
| 2 | +; RUN: | FileCheck -check-prefix=XTENSA-STRUCT16 %s |
| 3 | +; RUN: llc -mtriple=xtensa -mcpu=esp32 -verify-machineinstrs < %s \ |
| 4 | +; RUN: | FileCheck -check-prefix=XTENSA-I128 %s |
| 5 | + |
| 6 | +%struct.S = type { [4 x i32] } |
| 7 | + |
| 8 | +@v = dso_local global i32 0, align 4 |
| 9 | + |
| 10 | +define dso_local void @caller_struct_a128b_1([4 x i32] %0) { |
| 11 | + |
| 12 | +; XTENSA-STRUCT16-LABEL: caller_struct_a128b_1: |
| 13 | +; XTENSA-STRUCT16-NEXT: .cfi_startproc |
| 14 | +; XTENSA-STRUCT16: # %bb.0: |
| 15 | +; XTENSA-STRUCT16-NEXT: entry a1, 32 |
| 16 | +; XTENSA-STRUCT16-NEXT: .cfi_def_cfa_offset 32 |
| 17 | +; XTENSA-STRUCT16-NEXT: l32r a8, .LCPI0_0 |
| 18 | +; XTENSA-STRUCT16-NEXT: mov.n a10, a2 |
| 19 | +; XTENSA-STRUCT16-NEXT: mov.n a11, a3 |
| 20 | +; XTENSA-STRUCT16-NEXT: mov.n a12, a4 |
| 21 | +; XTENSA-STRUCT16-NEXT: mov.n a13, a5 |
| 22 | +; XTENSA-STRUCT16-NEXT: callx8 a8 |
| 23 | +; XTENSA-STRUCT16-NEXT: retw.n |
| 24 | + |
| 25 | + call void @callee_struct_a128b_1([4 x i32] %0) |
| 26 | + ret void |
| 27 | +} |
| 28 | + |
| 29 | +declare dso_local void @callee_struct_a128b_1([4 x i32]) |
| 30 | + |
| 31 | +define dso_local void @caller_struct_a128b_2([4 x i32] %0) { |
| 32 | +; XTENSA-STRUCT16-LABEL: caller_struct_a128b_2: |
| 33 | +; XTENSA-STRUCT16: .cfi_startproc |
| 34 | +; XTENSA-STRUCT16-NEXT: # %bb.0: |
| 35 | +; XTENSA-STRUCT16-NEXT: entry a1, 32 |
| 36 | +; XTENSA-STRUCT16-NEXT: .cfi_def_cfa_offset 32 |
| 37 | +; XTENSA-STRUCT16-NEXT: l32r a8, .LCPI1_0 |
| 38 | +; XTENSA-STRUCT16-NEXT: l32i.n a14, a8, 0 |
| 39 | +; XTENSA-STRUCT16-NEXT: l32r a8, .LCPI1_1 |
| 40 | +; XTENSA-STRUCT16-NEXT: mov.n a10, a2 |
| 41 | +; XTENSA-STRUCT16-NEXT: mov.n a11, a3 |
| 42 | +; XTENSA-STRUCT16-NEXT: mov.n a12, a4 |
| 43 | +; XTENSA-STRUCT16-NEXT: mov.n a13, a5 |
| 44 | +; XTENSA-STRUCT16-NEXT: callx8 a8 |
| 45 | +; XTENSA-STRUCT16-NEXT: retw.n |
| 46 | + |
| 47 | + %2 = load i32, i32* @v, align 4 |
| 48 | + call void @callee_struct_a128b_2([4 x i32] %0, i32 noundef %2) |
| 49 | + ret void |
| 50 | +} |
| 51 | + |
| 52 | +declare dso_local void @callee_struct_a128b_2([4 x i32], i32 noundef) |
| 53 | + |
| 54 | +define dso_local void @caller_struct_a128b_3([4 x i32] %0) { |
| 55 | +; XTENSA-STRUCT16-LABEL: caller_struct_a128b_3: |
| 56 | +; XTENSA-STRUCT16: .cfi_startproc |
| 57 | +; XTENSA-STRUCT16-NEXT: # %bb.0: |
| 58 | +; XTENSA-STRUCT16-NEXT: entry a1, 64 |
| 59 | +; XTENSA-STRUCT16-NEXT: .cfi_def_cfa_offset 64 |
| 60 | +; XTENSA-STRUCT16-NEXT: s32i.n a5, a1, 28 |
| 61 | +; XTENSA-STRUCT16-NEXT: s32i.n a4, a1, 24 |
| 62 | +; XTENSA-STRUCT16-NEXT: s32i.n a3, a1, 20 |
| 63 | +; XTENSA-STRUCT16-NEXT: s32i.n a2, a1, 16 |
| 64 | +; XTENSA-STRUCT16-NEXT: l32r a8, .LCPI2_0 |
| 65 | +; XTENSA-STRUCT16-NEXT: l32i.n a10, a8, 0 |
| 66 | +; XTENSA-STRUCT16-NEXT: l32i.n a8, a1, 28 |
| 67 | +; XTENSA-STRUCT16-NEXT: s32i.n a8, a1, 12 |
| 68 | +; XTENSA-STRUCT16-NEXT: l32i.n a8, a1, 24 |
| 69 | +; XTENSA-STRUCT16-NEXT: s32i.n a8, a1, 8 |
| 70 | +; XTENSA-STRUCT16-NEXT: l32i.n a8, a1, 20 |
| 71 | +; XTENSA-STRUCT16-NEXT: s32i.n a8, a1, 4 |
| 72 | +; XTENSA-STRUCT16-NEXT: l32i.n a8, a1, 16 |
| 73 | +; XTENSA-STRUCT16-NEXT: s32i.n a8, a1, 0 |
| 74 | +; XTENSA-STRUCT16-NEXT: l32r a8, .LCPI2_1 |
| 75 | +; XTENSA-STRUCT16-NEXT: callx8 a8 |
| 76 | +; XTENSA-STRUCT16-NEXT: retw.n |
| 77 | + |
| 78 | + %2 = alloca %struct.S, align 16 |
| 79 | + %3 = extractvalue [4 x i32] %0, 0 |
| 80 | + %4 = getelementptr inbounds %struct.S, %struct.S* %2, i32 0, i32 0, i32 0 |
| 81 | + store i32 %3, i32* %4, align 16 |
| 82 | + %5 = extractvalue [4 x i32] %0, 1 |
| 83 | + %6 = getelementptr inbounds %struct.S, %struct.S* %2, i32 0, i32 0, i32 1 |
| 84 | + store i32 %5, i32* %6, align 4 |
| 85 | + %7 = extractvalue [4 x i32] %0, 2 |
| 86 | + %8 = getelementptr inbounds %struct.S, %struct.S* %2, i32 0, i32 0, i32 2 |
| 87 | + store i32 %7, i32* %8, align 8 |
| 88 | + %9 = extractvalue [4 x i32] %0, 3 |
| 89 | + %10 = getelementptr inbounds %struct.S, %struct.S* %2, i32 0, i32 0, i32 3 |
| 90 | + store i32 %9, i32* %10, align 4 |
| 91 | + %11 = load i32, i32* @v, align 4 |
| 92 | + call void @callee_struct_a128b_3(i32 noundef %11, %struct.S* noundef nonnull byval(%struct.S) align 16 %2) |
| 93 | + ret void |
| 94 | +} |
| 95 | + |
| 96 | +declare dso_local void @callee_struct_a128b_3(i32 noundef, %struct.S* noundef byval(%struct.S) align 16) |
| 97 | + |
| 98 | +define dso_local void @caller_i128b_1(i128 noundef %0) { |
| 99 | +; XTENSA-I128-LABEL: caller_i128b_1: |
| 100 | +; XTENSA-I128: .cfi_startproc |
| 101 | +; XTENSA-I128-NEXT: # %bb.0: |
| 102 | +; XTENSA-I128-NEXT: entry a1, 32 |
| 103 | +; XTENSA-I128-NEXT: .cfi_def_cfa_offset 32 |
| 104 | +; XTENSA-I128-NEXT: l32r a8, .LCPI3_0 |
| 105 | +; XTENSA-I128-NEXT: mov.n a10, a2 |
| 106 | +; XTENSA-I128-NEXT: mov.n a11, a3 |
| 107 | +; XTENSA-I128-NEXT: mov.n a12, a4 |
| 108 | +; XTENSA-I128-NEXT: mov.n a13, a5 |
| 109 | +; XTENSA-I128-NEXT: callx8 a8 |
| 110 | +; XTENSA-I128-NEXT: retw.n |
| 111 | + |
| 112 | + call void @callee_i128b_1(i128 noundef %0) |
| 113 | + ret void |
| 114 | +} |
| 115 | + |
| 116 | +declare dso_local void @callee_i128b_1(i128 noundef) |
| 117 | + |
| 118 | +define dso_local void @caller_i128b_2(i128 noundef %0) { |
| 119 | +; XTENSA-I128-LABEL: caller_i128b_2: |
| 120 | +; XTENSA-I128: .cfi_startproc |
| 121 | +; XTENSA-I128-NEXT: # %bb.0: |
| 122 | +; XTENSA-I128-NEXT: entry a1, 32 |
| 123 | +; XTENSA-I128-NEXT: .cfi_def_cfa_offset 32 |
| 124 | +; XTENSA-I128-NEXT: l32r a8, .LCPI4_0 |
| 125 | +; XTENSA-I128-NEXT: l32i.n a14, a8, 0 |
| 126 | +; XTENSA-I128-NEXT: l32r a8, .LCPI4_1 |
| 127 | +; XTENSA-I128-NEXT: mov.n a10, a2 |
| 128 | +; XTENSA-I128-NEXT: mov.n a11, a3 |
| 129 | +; XTENSA-I128-NEXT: mov.n a12, a4 |
| 130 | +; XTENSA-I128-NEXT: mov.n a13, a5 |
| 131 | +; XTENSA-I128-NEXT: callx8 a8 |
| 132 | +; XTENSA-I128-NEXT: retw.n |
| 133 | + |
| 134 | + %2 = load i32, i32* @v, align 4 |
| 135 | + call void @callee_i128b_2(i128 noundef %0, i32 noundef %2) |
| 136 | + ret void |
| 137 | +} |
| 138 | + |
| 139 | +declare dso_local void @callee_i128b_2(i128 noundef, i32 noundef) |
| 140 | + |
| 141 | +define dso_local void @caller_i128b_3(i128 noundef %0) { |
| 142 | +; XTENSA-I128-LABEL: caller_i128b_3: |
| 143 | +; XTENSA-I128: .cfi_startproc |
| 144 | +; XTENSA-I128-NEXT: # %bb.0: |
| 145 | +; XTENSA-I128-NEXT: entry a1, 64 |
| 146 | +; XTENSA-I128-NEXT: .cfi_def_cfa_offset 64 |
| 147 | +; XTENSA-I128-NEXT: s32i.n a5, a1, 28 |
| 148 | +; XTENSA-I128-NEXT: s32i.n a4, a1, 24 |
| 149 | +; XTENSA-I128-NEXT: s32i.n a3, a1, 20 |
| 150 | +; XTENSA-I128-NEXT: s32i.n a2, a1, 16 |
| 151 | +; XTENSA-I128-NEXT: l32r a8, .LCPI5_0 |
| 152 | +; XTENSA-I128-NEXT: l32i.n a10, a8, 0 |
| 153 | +; XTENSA-I128-NEXT: l32i.n a8, a1, 28 |
| 154 | +; XTENSA-I128-NEXT: s32i.n a8, a1, 12 |
| 155 | +; XTENSA-I128-NEXT: l32i.n a8, a1, 24 |
| 156 | +; XTENSA-I128-NEXT: s32i.n a8, a1, 8 |
| 157 | +; XTENSA-I128-NEXT: l32i.n a8, a1, 20 |
| 158 | +; XTENSA-I128-NEXT: s32i.n a8, a1, 4 |
| 159 | +; XTENSA-I128-NEXT: l32i.n a8, a1, 16 |
| 160 | +; XTENSA-I128-NEXT: s32i.n a8, a1, 0 |
| 161 | +; XTENSA-I128-NEXT: l32r a8, .LCPI5_1 |
| 162 | +; XTENSA-I128-NEXT: callx8 a8 |
| 163 | +; XTENSA-I128-NEXT: retw.n |
| 164 | + |
| 165 | + %2 = alloca i128, align 16 |
| 166 | + %3 = load i32, i32* @v, align 4 |
| 167 | + store i128 %0, i128* %2, align 16 |
| 168 | + call void @callee_i128b_3(i32 noundef %3, i128* noundef nonnull byval(i128) align 16 %2) |
| 169 | + ret void |
| 170 | +} |
| 171 | + |
| 172 | +declare dso_local void @callee_i128b_3(i32 noundef, i128* noundef byval(i128) align 16) |
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