Skip to content

Commit 7210fc6

Browse files
gmalysapamolloy
gmalysa
authored and
pamolloy
committed
board: adi: Add support for SC598
This adds support for the Analog Devices SC598-SOM and configurations for using it with both the SOMCRR-EZKIT and SOMCRR-EZLITE. This adds dtsis for both Rev D (including older revisions) and Rev E SOMs, which are not compatible due to BOM changes. Although no new Rev D SOMs are produced as of 2025, many are in circulation, so the RevD dtsi is included to facilitate use for existing customers. Signed-off-by: Vasileios Bimpikas <[email protected]> Signed-off-by: Utsav Agarwal <[email protected]> Signed-off-by: Arturs Artamonovs <[email protected]> Signed-off-by: Nathan Barrett-Morrison <[email protected]> Signed-off-by: Caleb Ethridge <[email protected]> Signed-off-by: Philip Molloy <[email protected]> Signed-off-by: Greg Malysa <[email protected]> Signed-off-by: Philip Molloy <[email protected]> Link: https://lore.kernel.org/u-boot/[email protected]/
1 parent b1a7882 commit 7210fc6

File tree

14 files changed

+1093
-27
lines changed

14 files changed

+1093
-27
lines changed

‎arch/arm/dts/sc598-som-ezkit.dts‎

Lines changed: 167 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -5,9 +5,175 @@
55

66
/dts-v1/;
77

8-
#include "sc598-som.dtsi"
8+
#include "sc598-som-revE.dtsi"
99

1010
/ {
1111
model = "ADI SC598-SOM-EZKIT";
1212
compatible = "adi,sc598-som-ezkit", "adi,sc59x-64";
1313
};
14+
15+
&i2c2 {
16+
gpio_expander2: mcp23017@22 {
17+
compatible = "microchip,mcp23017";
18+
reg = <0x22>;
19+
gpio-controller;
20+
#gpio-cells = <2>;
21+
bootph-pre-ram;
22+
23+
eeprom {
24+
gpio-hog;
25+
gpios = <0 GPIO_ACTIVE_LOW>;
26+
output-high;
27+
line-name = "eeprom-en";
28+
bootph-pre-ram;
29+
};
30+
31+
pushbutton {
32+
gpio-hog;
33+
gpios = <1 GPIO_ACTIVE_LOW>;
34+
output-high;
35+
line-name = "pushbutton-en";
36+
bootph-pre-ram;
37+
};
38+
39+
microsd {
40+
gpio-hog;
41+
gpios = <2 GPIO_ACTIVE_LOW>;
42+
output-low;
43+
line-name = "microsd-spi";
44+
bootph-pre-ram;
45+
};
46+
47+
ftdi {
48+
gpio-hog;
49+
gpios = <3 GPIO_ACTIVE_LOW>;
50+
output-high;
51+
line-name = "ftdi-usb-en";
52+
bootph-pre-ram;
53+
};
54+
55+
can {
56+
gpio-hog;
57+
gpios = <4 GPIO_ACTIVE_LOW>;
58+
output-low;
59+
line-name = "can-en";
60+
bootph-pre-ram;
61+
};
62+
63+
adau1962 {
64+
gpio-hog;
65+
gpios = <6 GPIO_ACTIVE_LOW>;
66+
output-high;
67+
line-name = "adau1962-en";
68+
bootph-pre-ram;
69+
};
70+
71+
adau1979 {
72+
gpio-hog;
73+
gpios = <7 GPIO_ACTIVE_LOW>;
74+
output-high;
75+
line-name = "adau1979-en";
76+
bootph-pre-ram;
77+
};
78+
79+
octal {
80+
gpio-hog;
81+
gpios = <8 GPIO_ACTIVE_LOW>;
82+
output-high;
83+
line-name = "octal-spi-cs-en";
84+
bootph-pre-ram;
85+
};
86+
87+
spdif-dig {
88+
gpio-hog;
89+
gpios = <9 GPIO_ACTIVE_LOW>;
90+
output-low;
91+
line-name = "spdif-digital-en";
92+
bootph-pre-ram;
93+
};
94+
95+
spdif-opt {
96+
gpio-hog;
97+
gpios = <10 GPIO_ACTIVE_LOW>;
98+
output-low;
99+
line-name = "spdif-optical-en";
100+
bootph-pre-ram;
101+
};
102+
103+
audio-jack {
104+
gpio-hog;
105+
gpios = <11 GPIO_ACTIVE_HIGH>;
106+
output-high;
107+
line-name = "audio-jack-sel";
108+
bootph-pre-ram;
109+
};
110+
111+
mlb {
112+
gpio-hog;
113+
gpios = <12 GPIO_ACTIVE_HIGH>;
114+
output-high;
115+
line-name = "~mlb-en";
116+
bootph-pre-ram;
117+
};
118+
119+
eth1 {
120+
gpio-hog;
121+
gpios = <13 GPIO_ACTIVE_LOW>;
122+
output-high;
123+
line-name = "eth1-en";
124+
bootph-pre-ram;
125+
};
126+
127+
eth1-reset {
128+
gpio-hog;
129+
gpios = <14 GPIO_ACTIVE_LOW>;
130+
/*
131+
* USB0 lines are shared with Eth1 so Eth PHY must be held in reset
132+
* when using the USB
133+
*/
134+
output-high;
135+
line-name = "eth1-reset";
136+
bootph-pre-ram;
137+
};
138+
139+
gige-reset {
140+
gpio-hog;
141+
gpios = <15 GPIO_ACTIVE_LOW>;
142+
output-high;
143+
line-name = "gige-reset";
144+
bootph-pre-ram;
145+
};
146+
};
147+
};
148+
149+
&ospi {
150+
status = "okay";
151+
152+
clocks = <&clk ADSP_SC598_CLK_OSPI_REFCLK>;
153+
154+
flash0: mx66lm1g45@0 {
155+
#address-cells = <1>;
156+
#size-cells = <1>;
157+
compatible = "jedec,spi-nor", "mx66lm1g45";
158+
reg = <0>;
159+
160+
/*
161+
* This is board dependent to some extent. We've been able to
162+
*set it higher on some boards
163+
*/
164+
spi-max-frequency = <66666666>;
165+
cdns,spi-calib-frequency = <10000000>;
166+
167+
spi-tx-bus-width = <8>;
168+
spi-rx-bus-width = <8>;
169+
170+
tshsl-ns = <50>;
171+
tsd2d-ns = <50>;
172+
tchsh-ns = <4>;
173+
tslch-ns = <4>;
174+
bootph-pre-ram;
175+
176+
cdns,dqs;
177+
cdns,phy;
178+
};
179+
};

‎arch/arm/dts/sc598-som-ezlite.dts‎

Lines changed: 83 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -5,9 +5,91 @@
55

66
/dts-v1/;
77

8-
#include "sc598-som.dtsi"
8+
#include "sc598-som-revD.dtsi"
99

1010
/ {
1111
model = "ADI SC598-SOM-EZLITE";
1212
compatible = "adi,sc598-som-ezlite", "adi,sc59x-64";
1313
};
14+
15+
&i2c2 {
16+
gpio_expander: adp5588@30 {
17+
compatible = "adi,adp5588";
18+
reg = <0x30>;
19+
gpio-controller;
20+
#gpio-cells = <2>;
21+
bootph-pre-ram;
22+
23+
usb-spi0 {
24+
gpio-hog;
25+
gpios = <8 GPIO_ACTIVE_LOW>;
26+
output-low;
27+
line-name = "usb_spi0_en";
28+
bootph-pre-ram;
29+
};
30+
31+
usb-spi1 {
32+
gpio-hog;
33+
gpios = <9 GPIO_ACTIVE_LOW>;
34+
output-low;
35+
line-name = "usb_spi1_en";
36+
bootph-pre-ram;
37+
};
38+
39+
usb-qspi-en {
40+
gpio-hog;
41+
gpios = <10 GPIO_ACTIVE_LOW>;
42+
output-low;
43+
line-name = "usb_qspi_en";
44+
bootph-pre-ram;
45+
};
46+
47+
usb-qspi-reset {
48+
gpio-hog;
49+
gpios = <11 GPIO_ACTIVE_LOW>;
50+
output-high;
51+
line-name = "usb_qspi_reset";
52+
bootph-pre-ram;
53+
};
54+
55+
eth0-reset {
56+
gpio-hog;
57+
gpios = <12 GPIO_ACTIVE_LOW>;
58+
output-high;
59+
line-name = "eth0-reset";
60+
bootph-pre-ram;
61+
};
62+
63+
adau1372-pwrdwn {
64+
gpio-hog;
65+
gpios = <13 GPIO_ACTIVE_LOW>;
66+
output-high;
67+
line-name = "adau1372_pwrdwn";
68+
bootph-pre-ram;
69+
};
70+
71+
led1 {
72+
gpio-hog;
73+
gpios = <15 GPIO_ACTIVE_LOW>;
74+
output-high;
75+
line-name = "led1-en";
76+
bootph-pre-ram;
77+
};
78+
79+
led2 {
80+
gpio-hog;
81+
gpios = <16 GPIO_ACTIVE_LOW>;
82+
output-high;
83+
line-name = "led2-en";
84+
bootph-pre-ram;
85+
};
86+
87+
led3 {
88+
gpio-hog;
89+
gpios = <17 GPIO_ACTIVE_LOW>;
90+
output-high;
91+
line-name = "led3-en";
92+
bootph-pre-ram;
93+
};
94+
};
95+
};

‎arch/arm/dts/sc598-som-revD.dtsi‎

Lines changed: 72 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,72 @@
1+
// SPDX-License-Identifier: GPL-2.0-or-later
2+
/*
3+
* (C) Copyright 2025 - Analog Devices, Inc.
4+
*/
5+
6+
/dts-v1/;
7+
8+
#include "sc598-som.dtsi"
9+
10+
&i2c2 {
11+
som_gpio_expander: mcp23018@20 {
12+
compatible = "microchip,mcp23018";
13+
reg = <0x20>;
14+
gpio-controller;
15+
#gpio-cells = <2>;
16+
bootph-pre-ram;
17+
drive-pullups;
18+
19+
led1 {
20+
gpio-hog;
21+
gpios = <0 GPIO_ACTIVE_HIGH>;
22+
output-low;
23+
line-name = "led1-en";
24+
bootph-pre-ram;
25+
};
26+
27+
led2 {
28+
gpio-hog;
29+
gpios = <1 GPIO_ACTIVE_HIGH>;
30+
output-low;
31+
line-name = "led2-en";
32+
bootph-pre-ram;
33+
};
34+
35+
led3 {
36+
gpio-hog;
37+
gpios = <2 GPIO_ACTIVE_HIGH>;
38+
output-low;
39+
line-name = "led3-en";
40+
bootph-pre-ram;
41+
};
42+
43+
spi2d2-d3 {
44+
gpio-hog;
45+
gpios = <3 GPIO_ACTIVE_LOW>;
46+
output-high;
47+
line-name = "spi2d2-d3-en";
48+
bootph-pre-ram;
49+
};
50+
51+
spi2flash-cs {
52+
gpio-hog;
53+
gpios = <4 GPIO_ACTIVE_LOW>;
54+
output-high;
55+
line-name = "spi2flash-cs";
56+
bootph-pre-ram;
57+
};
58+
};
59+
};
60+
61+
&spi2 {
62+
flash1: is25lp512@1 {
63+
#address-cells = <1>;
64+
#size-cells = <1>;
65+
compatible = "jedec,spi-nor", "is25lp512";
66+
reg = <1>;
67+
spi-tx-bus-width = <4>;
68+
spi-rx-bus-width = <4>;
69+
spi-max-frequency = <10000000>;
70+
bootph-pre-ram;
71+
};
72+
};

0 commit comments

Comments
 (0)