Potentially useful SW

[umarcor]

This issue was created in repo VHDL/sphinx-vhdl, which was a placeholder (now removed).

@Nic30
Hello,

there is some sphinx plugin, which can generate schematic, from HDL.
d3-hwschematic
sphinx-hwt (would not recommend, as it requires conversion of VHDL to a different lang. first, but this is an example of features which we can expect )

There is also SW which can generate nice preview of component IP.
symbolator

There is parser which also keeps comments with AST.
hdlConvertor

Together they are used in plug-in for sphinx (also called sphinx-vhdl...). This plug-in is not public, because it contains too many hot fixes for some specific codes.

@nobodywasishere
I'm currently waiting for a PR to be merged, then VHDL will be supported by sphinxcontrib-hdl-diagrams, which also takes code from files and converts them into a diagram using yosys and netlistsvg.

[Nic30]

there is some sphinx plugin, which can generate schematic, from HDL?

Only thing I know about is that Cesnet is working on something, but I do not know the detail I think it is work of several students on summer job.

I also do have several prototypes but I did not finish them because it just looks like RTL view in Vivado.
If you are planing something maybe I can help or at least I can reference more interested people.

[bradleyharden]

I don't have the bandwidth to work on this right now, but at one point I had a pretty good understanding of the way Sphinx parses and constructs reST nodes. I tried to capture that in #4, but there was never much discussion. I'd like to hear what other people think, especially if you're familiar with the internals of Sphinx.

[Nic30]

especially if you're familiar with the internals of Sphinx

Just what I did learn on the way by myself. It is hard to quantify. Also sphinx-hwt have several sub-optimal things. Namely how directive is directly called from other directive among other things. So I am slightly more advanced than that.

I posted at least something.