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* February 18th: I attended the second team meeting on Zoom due to delaying MTA trains.
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## Week of February 23rd
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### RiSC-16 Onboarding Project
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* February 23rd: [Tim](https://github.com/NYU-Processor-Design/nyu-processor-design.github.io/blob/main/src/design_notebooks/2026spring/tc3956.md) and I finished the module of Assignment 4 of the onboarding project, collaborating using Live Share extension on Virtual Studio Code.
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* We implemented the ALU testbench. We also wondered whether a dedicated folder should be created for testbenches.
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* Another module (Sixth RiSC-16 Module:
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Control Module) of the onboarding project was included in the assignment slides, ofwhich not much information was shared. We henceforth decided not to accomplish it for now.
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* We were able to meet at the intended time.
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* We were able to meet at the intended time.
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## Week of March 2nd
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### RiSC-16 Onboarding Project
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* March 2nd: [Tim](https://github.com/NYU-Processor-Design/nyu-processor-design.github.io/blob/main/src/design_notebooks/2026spring/tc3956.md) and I started Assignment 5 of the onboarding project. However, we could not finish due to upcoming midterms so decided to proceed in the following week.
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### Team Meeting
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* March 4th: I attended the third team meeting in-person and chose to be working with [Noah](https://nyu-processor-design.github.io/design_notebooks/2026spring/nm4207.html) and [Ghala](https://nyu-processor-design.github.io/design_notebooks/2026spring/gb2789.html) in the Core team.
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## Week of March 9th
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### RiSC-16 Onboarding Project
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* March 11th: [Tim](https://github.com/NYU-Processor-Design/nyu-processor-design.github.io/blob/main/src/design_notebooks/2026spring/tc3956.md) and I started Assignment 5 of the onboarding project. We successfully compiled and ran our RiSC-16 processor with the provided testbench and confirmed all outputs were corrects.
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