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radek-isaradek-isa
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Merge branch 'isa_straddling' into 'devel'
fix straddling in PCIE seqeune and add checking See merge request ndk/ndk-fpga!313
2 parents 73b7baa + 8a00929 commit 199eca1

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‎comp/pcie/convertors/cc_mfb2axi/uvm/Modules.tcl‎

Lines changed: 12 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -6,12 +6,18 @@
66

77
# Set paths
88

9-
lappend COMPONENTS [ list "SV_MFB_UVM_BASE" "$OFM_PATH/comp/uvm/mfb" "FULL"]
10-
lappend COMPONENTS [ list "SV_AXI_UVM_BASE" "$OFM_PATH/comp/uvm/axi" "FULL"]
11-
lappend COMPONENTS [ list "SV_LOGIC_VECTROR_ARRAY" "$OFM_PATH/comp/uvm/logic_vector_array" "FULL"]
12-
lappend COMPONENTS [ list "SV_LOGIC_VECTROR_MFB" "$OFM_PATH/comp/uvm/logic_vector_array_mfb" "FULL"]
13-
lappend COMPONENTS [ list "SV_LOGIC_VECTROR_AXI" "$OFM_PATH/comp/uvm/logic_vector_array_axi" "FULL"]
14-
lappend COMPONENTS [ list "MODEL_MFB2AVST_CONVERTOR" "$OFM_PATH/comp/pcie/others/mfb2avst/uvm" "FULL"]
9+
#lappend COMPONENTS [ list "SV_MFB_UVM_BASE" "$OFM_PATH/comp/uvm/mfb" "FULL"]
10+
#lappend COMPONENTS [ list "SV_AXI_UVM_BASE" "$OFM_PATH/comp/uvm/axi" "FULL"]
11+
#lappend COMPONENTS [ list "SV_LOGIC_VECTROR_ARRAY" "$OFM_PATH/comp/uvm/logic_vector_array" "FULL"]
12+
#lappend COMPONENTS [ list "SV_LOGIC_VECTROR_MFB" "$OFM_PATH/comp/uvm/logic_vector_array_mfb" "FULL"]
13+
#lappend COMPONENTS [ list "SV_LOGIC_VECTROR_AXI" "$OFM_PATH/comp/uvm/logic_vector_array_axi" "FULL"]
14+
#lappend COMPONENTS [ list "MODEL_MFB2AVST_CONVERTOR" "$OFM_PATH/comp/pcie/others/mfb2avst/uvm" "FULL"]
15+
16+
17+
lappend COMPONENTS [ list "SV_PCIE_AXI" "$OFM_PATH/comp/uvm/pcie_axi" "FULL"]
18+
lappend COMPONENTS [ list "SV_LOGIC_VECTROR_MFB" "$OFM_PATH/comp/uvm/logic_vector_array_mfb" "FULL"]
19+
20+
#lappend COMPONENTS [ list "MODEL_MFB2AVST_CONVERTOR" "$OFM_PATH/comp/pcie/others/mfb2avst/uvm" "FULL"]
1521

1622

1723
lappend MOD "$ENTITY_BASE/tbench/env/pkg.sv"

‎comp/pcie/convertors/cc_mfb2axi/uvm/signals_sig.fdo‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -8,7 +8,7 @@ source "./signals.fdo"
88

99
add wave -divider "PCIE_CQ_AXI2MFB"
1010

11-
add_wave "-noupdate -color yellow -label RST" /testbench/RST
11+
add_wave "-noupdate -color yellow -label RST" /testbench/reset.RESET
1212
add_wave "-noupdate -color yellow -label CLK" /testbench/CLK
1313

1414
all ALL /testbench/DUT_U/VHDL_DUT_U

‎comp/pcie/convertors/cc_mfb2axi/uvm/tbench/dut.sv‎

Lines changed: 19 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -6,13 +6,19 @@
66

77
import test::*;
88

9-
module DUT (
9+
module DUT #(
10+
logic STRADDLING
11+
)
12+
(
1013
input logic CLK,
1114
input logic RST,
1215
axi_if.dut_tx axi_cc,
1316
mfb_if.dut_rx mfb_cc
14-
);
17+
);
1518

19+
localparam ITEM_WIDTH = 32;
20+
localparam ITEMS = MFB_REGIONS*MFB_REGION_SIZE*MFB_BLOCK_SIZE;
21+
localparam TUSER_WIDTH = uvm_pcie_axi::tuser_width_get(ITEMS, uvm_pcie_axi::AXI_CC);
1622
logic [((MFB_REGION_SIZE != 1) ? MFB_REGIONS*$clog2(MFB_REGION_SIZE) : MFB_REGIONS)-1 : 0] cc_sof_pos;
1723

1824
assign cc_sof_pos = mfb_cc.SOF_POS;
@@ -21,25 +27,25 @@ module DUT (
2127
.MFB_REGIONS (MFB_REGIONS),
2228
.MFB_REGION_SIZE (MFB_REGION_SIZE),
2329
.MFB_BLOCK_SIZE (MFB_BLOCK_SIZE),
24-
.MFB_ITEM_WIDTH (MFB_ITEM_WIDTH),
25-
.AXI_CCUSER_WIDTH (CC_TUSER_WIDTH),
26-
.AXI_DATA_WIDTH (CC_TDATA_WIDTH),
30+
.MFB_ITEM_WIDTH (ITEM_WIDTH),
31+
.AXI_CCUSER_WIDTH (TUSER_WIDTH),
32+
.AXI_DATA_WIDTH (ITEMS*ITEM_WIDTH),
2733
.STRADDLING (STRADDLING)
2834
) VHDL_DUT_U (
29-
.CC_AXI_DATA (axi_cc.TDATA),
30-
.CC_AXI_USER (axi_cc.TUSER),
31-
.CC_AXI_LAST (axi_cc.TLAST),
32-
.CC_AXI_KEEP (axi_cc.TKEEP),
33-
.CC_AXI_VALID (axi_cc.TVALID),
34-
.CC_AXI_READY (axi_cc.TREADY),
35-
3635
.CC_MFB_DATA (mfb_cc.DATA),
3736
.CC_MFB_SOF (mfb_cc.SOF),
3837
.CC_MFB_EOF (mfb_cc.EOF),
3938
.CC_MFB_SOF_POS (cc_sof_pos),
4039
.CC_MFB_EOF_POS (mfb_cc.EOF_POS),
4140
.CC_MFB_SRC_RDY (mfb_cc.SRC_RDY),
42-
.CC_MFB_DST_RDY (mfb_cc.DST_RDY)
41+
.CC_MFB_DST_RDY (mfb_cc.DST_RDY),
42+
43+
.CC_AXI_DATA (axi_cc.TDATA),
44+
.CC_AXI_USER (axi_cc.TUSER),
45+
.CC_AXI_LAST (axi_cc.TLAST),
46+
.CC_AXI_KEEP (axi_cc.TKEEP),
47+
.CC_AXI_VALID (axi_cc.TVALID),
48+
.CC_AXI_READY (axi_cc.TREADY)
4349
);
4450

4551

‎comp/pcie/convertors/cc_mfb2axi/uvm/tbench/env/env.sv‎

Lines changed: 23 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -6,20 +6,27 @@
66

77
// Environment for functional verification of encode.
88
// This environment containts two mii agents.
9-
class env #(MFB_REGIONS, MFB_REGION_SIZE, MFB_BLOCK_SIZE, MFB_ITEM_WIDTH, CC_TDATA_WIDTH, CC_TUSER_WIDTH, STRADDLING) extends uvm_env;
9+
class env #(
10+
int unsigned MFB_REGIONS,
11+
int unsigned MFB_REGION_SIZE,
12+
int unsigned MFB_BLOCK_SIZE,
13+
string DEVICE,
14+
logic STRADDLING
15+
) extends uvm_env;
1016

11-
`uvm_component_param_utils(uvm_pcie_cc_mfb2axi::env #(MFB_REGIONS, MFB_REGION_SIZE, MFB_BLOCK_SIZE, MFB_ITEM_WIDTH, CC_TDATA_WIDTH, CC_TUSER_WIDTH, STRADDLING));
17+
`uvm_component_param_utils(uvm_pcie_cc_mfb2axi::env #(MFB_REGIONS, MFB_REGION_SIZE, MFB_BLOCK_SIZE, DEVICE, STRADDLING));
1218

13-
uvm_logic_vector_array_mfb::env_rx #(MFB_REGIONS, MFB_REGION_SIZE, MFB_BLOCK_SIZE, MFB_ITEM_WIDTH, 0) mfb_cc_env;
14-
uvm_logic_vector_array_mfb::config_item mfb_cc_cfg;
15-
uvm_logic_vector_array_axi::env_tx #(CC_TDATA_WIDTH, CC_TUSER_WIDTH, MFB_ITEM_WIDTH, MFB_REGIONS, MFB_BLOCK_SIZE, STRADDLING) axi_cc_env;
16-
uvm_logic_vector_array_axi::config_item axi_cc_cfg;
19+
localparam ITEM_WIDTH = 32;
20+
localparam PCIE_ITEMS = MFB_REGIONS*MFB_REGION_SIZE*MFB_BLOCK_SIZE;
1721

18-
uvm_pcie_cc_mfb2axi::virt_sequencer#(CC_TDATA_WIDTH, CC_TUSER_WIDTH, MFB_REGIONS, MFB_ITEM_WIDTH) vscr;
22+
uvm_logic_vector_array_mfb::env_rx #(MFB_REGIONS, MFB_REGION_SIZE, MFB_BLOCK_SIZE, ITEM_WIDTH, 0) mfb_cc_env;
23+
uvm_pcie_axi::env_tx #(PCIE_ITEMS, uvm_pcie_axi::AXI_CC, DEVICE, STRADDLING) axi_cc_env;
24+
25+
uvm_pcie_cc_mfb2axi::virt_sequencer vscr;
1926
uvm_reset::agent m_reset;
2027
uvm_reset::config_item m_config_reset;
2128

22-
scoreboard #(MFB_ITEM_WIDTH) m_scoreboard;
29+
scoreboard m_scoreboard;
2330

2431

2532
// Constructor of environment.
@@ -29,6 +36,8 @@ class env #(MFB_REGIONS, MFB_REGION_SIZE, MFB_BLOCK_SIZE, MFB_ITEM_WIDTH, CC_TDA
2936

3037
// Create base components of environment.
3138
function void build_phase(uvm_phase phase);
39+
uvm_logic_vector_array_mfb::config_item mfb_cc_cfg;
40+
uvm_pcie::config_item axi_cc_cfg;
3241

3342
axi_cc_cfg = new;
3443
mfb_cc_cfg = new;
@@ -50,28 +59,26 @@ class env #(MFB_REGIONS, MFB_REGION_SIZE, MFB_BLOCK_SIZE, MFB_ITEM_WIDTH, CC_TDA
5059
uvm_config_db #(uvm_reset::config_item)::set(this, "m_reset", "m_config", m_config_reset);
5160
m_reset = uvm_reset::agent::type_id::create("m_reset", this);
5261

53-
uvm_config_db #(uvm_logic_vector_array_axi::config_item)::set(this, "axi_cc_env", "m_config", axi_cc_cfg);
62+
uvm_config_db #(uvm_pcie::config_item)::set(this, "axi_cc_env", "m_config", axi_cc_cfg);
5463
uvm_config_db #(uvm_logic_vector_array_mfb::config_item)::set(this, "mfb_cc_env", "m_config", mfb_cc_cfg);
5564

56-
axi_cc_env = uvm_logic_vector_array_axi::env_tx #(CC_TDATA_WIDTH, CC_TUSER_WIDTH, MFB_ITEM_WIDTH, MFB_REGIONS, MFB_BLOCK_SIZE, STRADDLING)::type_id::create("axi_cc_env", this);
57-
mfb_cc_env = uvm_logic_vector_array_mfb::env_rx #(MFB_REGIONS, MFB_REGION_SIZE, MFB_BLOCK_SIZE, MFB_ITEM_WIDTH, 0)::type_id::create("mfb_cc_env", this);
65+
axi_cc_env = uvm_pcie_axi::env_tx #(PCIE_ITEMS, uvm_pcie_axi::AXI_CC, DEVICE, STRADDLING)::type_id::create("axi_cc_env", this);
66+
mfb_cc_env = uvm_logic_vector_array_mfb::env_rx #(MFB_REGIONS, MFB_REGION_SIZE, MFB_BLOCK_SIZE, ITEM_WIDTH, 0)::type_id::create("mfb_cc_env", this);
5867

59-
m_scoreboard = scoreboard #(MFB_ITEM_WIDTH)::type_id::create("m_scoreboard", this);
60-
vscr = uvm_pcie_cc_mfb2axi::virt_sequencer#(CC_TDATA_WIDTH, CC_TUSER_WIDTH, MFB_REGIONS, MFB_ITEM_WIDTH)::type_id::create("vscr",this);
68+
m_scoreboard = scoreboard::type_id::create("m_scoreboard", this);
69+
vscr = uvm_pcie_cc_mfb2axi::virt_sequencer::type_id::create("vscr",this);
6170
endfunction
6271

6372
// Connect agent's ports with ports from scoreboard.
6473
function void connect_phase(uvm_phase phase);
6574

6675
mfb_cc_env.analysis_port_data.connect(m_scoreboard.analysis_imp_mfb_cc);
67-
axi_cc_env.analysis_port_data.connect(m_scoreboard.analysis_imp_axi_cc);
76+
axi_cc_env.analysis_port.connect(m_scoreboard.cmp.analysis_imp_dut);
6877

6978
m_reset.sync_connect(mfb_cc_env.reset_sync);
7079
m_reset.sync_connect(axi_cc_env.reset_sync);
7180

7281
vscr.m_reset = m_reset.m_sequencer;
7382
vscr.m_logic_vector_array_scr = mfb_cc_env.m_sequencer.m_data;
74-
vscr.m_pcie = axi_cc_env.m_sequencer;
75-
7683
endfunction
7784
endclass

‎comp/pcie/convertors/cc_mfb2axi/uvm/tbench/env/scoreboard.sv‎

Lines changed: 30 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -4,47 +4,59 @@
44

55
//-- SPDX-License-Identifier: BSD-3-Clause
66

7-
class scoreboard #(ITEM_WIDTH) extends uvm_scoreboard;
87

9-
`uvm_component_utils(uvm_pcie_cc_mfb2axi::scoreboard #(ITEM_WIDTH))
10-
// Analysis components.
11-
uvm_analysis_export #(uvm_logic_vector_array::sequence_item#(ITEM_WIDTH)) analysis_imp_mfb_cc;
12-
uvm_analysis_export #(uvm_logic_vector_array::sequence_item#(ITEM_WIDTH)) analysis_imp_axi_cc;
8+
class scoreboard_cmp extends uvm_common::comparer_base_ordered#(
9+
uvm_logic_vector_array::sequence_item#(32),
10+
uvm_pcie::header
11+
);
12+
`uvm_component_param_utils(uvm_pcie_cc_mfb2axi::scoreboard_cmp)
13+
14+
function new(string name, uvm_component parent = null);
15+
super.new(name, parent);
16+
endfunction
17+
18+
virtual function int unsigned compare(MODEL_ITEM tr_model, DUT_ITEM tr_dut);
19+
uvm_pcie::completer_header hdr;
20+
hdr = uvm_pcie_axi::hdr_cc_get(tr_model.data);
21+
return hdr.compare(tr_dut);
22+
endfunction
1323

14-
uvm_common::comparer_ordered #(uvm_logic_vector_array::sequence_item#(ITEM_WIDTH)) data_cmp;
24+
endclass
25+
26+
class scoreboard extends uvm_scoreboard;
27+
`uvm_component_utils(uvm_pcie_cc_mfb2axi::scoreboard)
28+
29+
localparam ITEM_WIDTH = 32;
1530

16-
uvm_pcie_mfb2avst::model#(ITEM_WIDTH, 0) m_model;
31+
// Analysis components.
32+
uvm_analysis_export#(uvm_logic_vector_array::sequence_item#(ITEM_WIDTH)) analysis_imp_mfb_cc;
33+
34+
uvm_pcie_cc_mfb2axi::scoreboard_cmp cmp;
1735

1836
// Contructor of scoreboard.
1937
function new(string name, uvm_component parent);
2038
super.new(name, parent);
21-
analysis_imp_axi_cc = new("analysis_imp_axi_cc", this);
2239
analysis_imp_mfb_cc = new("analysis_imp_mfb_cc", this);
2340
endfunction
2441

2542
function int unsigned used();
2643
int unsigned ret = 0;
27-
ret |= data_cmp.used();
28-
ret |= data_cmp.errors != 0;
44+
ret |= cmp.used();
2945
return ret;
3046
endfunction
3147

3248
function void build_phase(uvm_phase phase);
33-
m_model = uvm_pcie_mfb2avst::model #(ITEM_WIDTH, 0)::type_id::create("m_model", this);
34-
35-
data_cmp = uvm_common::comparer_ordered #(uvm_logic_vector_array::sequence_item#(ITEM_WIDTH))::type_id::create("data_cmp", this);
36-
data_cmp.model_tr_timeout_set(10ns);
49+
cmp = uvm_pcie_cc_mfb2axi::scoreboard_cmp::type_id::create("cmp", this);
50+
cmp.model_tr_timeout_set(10ns);
3751
endfunction
3852

3953
function void connect_phase(uvm_phase phase);
40-
analysis_imp_mfb_cc.connect(m_model.data_in.analysis_export);
41-
m_model.data_out.connect(data_cmp.analysis_imp_model);
42-
analysis_imp_axi_cc.connect(data_cmp.analysis_imp_dut);
54+
analysis_imp_mfb_cc.connect(cmp.analysis_imp_model);
4355
endfunction
4456

4557
virtual function void report_phase(uvm_phase phase);
4658
string msg = "\n";
47-
msg = {msg, $sformatf("\tCompared/errors: %0d/%0d\n", data_cmp.compared, data_cmp.errors)};
59+
msg = {msg, $sformatf("\tCompared/errors: %0d/%0d\n", cmp.compared, cmp.errors)};
4860

4961
if (this.used() == 0) begin
5062
`uvm_info(get_type_name(), $sformatf("%s\n\n\t---------------------------------------\n\t---- VERIFICATION SUCCESS ----\n\t---------------------------------------", msg), UVM_NONE)

‎comp/pcie/convertors/cc_mfb2axi/uvm/tbench/env/sequencer.sv‎

Lines changed: 4 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -5,12 +5,11 @@
55
// SPDX-License-Identifier: BSD-3-Clause
66

77

8-
class virt_sequencer#(DATA_WIDTH, TUSER_WIDTH, MFB_REGIONS, MFB_ITEM_WIDTH) extends uvm_sequencer;
9-
`uvm_component_param_utils(uvm_pcie_cc_mfb2axi::virt_sequencer#(DATA_WIDTH, TUSER_WIDTH, MFB_REGIONS, MFB_ITEM_WIDTH))
8+
class virt_sequencer extends uvm_sequencer;
9+
`uvm_component_param_utils(uvm_pcie_cc_mfb2axi::virt_sequencer)
1010

11-
uvm_reset::sequencer m_reset;
12-
uvm_logic_vector_array::sequencer#(MFB_ITEM_WIDTH) m_logic_vector_array_scr;
13-
uvm_axi::sequencer #(DATA_WIDTH, TUSER_WIDTH, MFB_REGIONS) m_pcie;
11+
uvm_reset::sequencer m_reset;
12+
uvm_logic_vector_array::sequencer#(32) m_logic_vector_array_scr;
1413

1514
function new(string name = "virt_sequencer", uvm_component parent);
1615
super.new(name, parent);

‎comp/pcie/convertors/cc_mfb2axi/uvm/tbench/testbench.sv‎

Lines changed: 24 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -10,37 +10,35 @@ import test::*;
1010

1111
module testbench;
1212

13+
localparam ITEMS = MFB_REGIONS*MFB_REGION_SIZE*MFB_BLOCK_SIZE;
14+
localparam ITEM_WIDTH = 32;
15+
localparam TUSER_WIDTH = uvm_pcie_axi::tuser_width_get(ITEMS, uvm_pcie_axi::AXI_CC);
16+
1317
// -------------------------------------------------------------------------------------------------------------------------------------------------------------------
1418
// Signals
1519
logic CLK = 0;
16-
logic RST = 0;
1720

1821
// -------------------------------------------------------------------------------------------------------------------------------------------------------------------
1922
// Interfaces
2023
reset_if reset(CLK);
21-
axi_if #(CC_TDATA_WIDTH, CC_TUSER_WIDTH) axi_cc(CLK);
22-
mfb_if #(MFB_REGIONS, MFB_REGION_SIZE, MFB_BLOCK_SIZE, MFB_ITEM_WIDTH, 0) mfb_cc(CLK);
24+
pullup (reset.RESET);
25+
26+
axi_if #(ITEMS, 32, TUSER_WIDTH) axi_cc(CLK);
27+
mfb_if #(MFB_REGIONS, MFB_REGION_SIZE, MFB_BLOCK_SIZE, ITEM_WIDTH, 0) mfb_cc(CLK);
2328

2429
// -------------------------------------------------------------------------------------------------------------------------------------------------------------------
2530
// Define clock period
2631
always #(CLK_PERIOD) CLK = ~CLK;
2732

28-
// -------------------------------------------------------------------------------------------------------------------------------------------------------------------
29-
// Initial reset
30-
initial begin
31-
RST = 1;
32-
#(RESET_CLKS*CLK_PERIOD)
33-
RST = 0;
34-
end
3533

3634
// -------------------------------------------------------------------------------------------------------------------------------------------------------------------
3735
// Start of tests
3836
initial begin
3937
uvm_root m_root;
4038
// Configuration of database
4139
uvm_config_db#(virtual reset_if)::set(null, "", "vif_reset", reset);
42-
uvm_config_db#(virtual axi_if #(CC_TDATA_WIDTH, CC_TUSER_WIDTH))::set(null, "", "vif_rx", axi_cc);
43-
uvm_config_db#(virtual mfb_if #(MFB_REGIONS, MFB_REGION_SIZE, MFB_BLOCK_SIZE, MFB_ITEM_WIDTH, 0))::set(null, "", "vif_tx", mfb_cc);
40+
uvm_config_db#(virtual axi_if #(ITEMS, 32, TUSER_WIDTH))::set(null, "", "vif_rx_axi", axi_cc);
41+
uvm_config_db#(virtual mfb_if #(MFB_REGIONS, MFB_REGION_SIZE, MFB_BLOCK_SIZE, ITEM_WIDTH, 0))::set(null, "", "vif_tx", mfb_cc);
4442

4543
m_root = uvm_root::get();
4644
m_root.finish_on_completion = 0;
@@ -55,11 +53,24 @@ module testbench;
5553

5654
// -------------------------------------------------------------------------------------------------------------------------------------------------------------------
5755
// DUT
58-
DUT DUT_U (
56+
DUT #(
57+
.STRADDLING (STRADDLING)
58+
)DUT_U (
5959
.CLK (CLK),
6060
.RST (reset.RESET),
6161
.axi_cc (axi_cc),
6262
.mfb_cc (mfb_cc)
6363
);
6464

65+
66+
axi_xilinx_property #(
67+
.ITEMS (ITEMS),
68+
.ITEM_WIDTH (32),
69+
.TUSER_WIDTH (TUSER_WIDTH),
70+
.STRADDLING (test::STRADDLING)
71+
)
72+
PROP (
73+
.RESET (reset.RESET),
74+
.vif (axi_cc)
75+
);
6576
endmodule

‎comp/pcie/convertors/cc_mfb2axi/uvm/tbench/tests/pkg.sv‎

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -12,15 +12,15 @@ package test;
1212
`include "uvm_macros.svh"
1313
import uvm_pkg::*;
1414

15-
parameter MFB_REGIONS = 1;
15+
parameter MFB_REGIONS = 2;
1616
parameter MFB_REGION_SIZE = 1;
1717
parameter MFB_BLOCK_SIZE = 8;
18-
parameter MFB_ITEM_WIDTH = 32;
19-
parameter MFB_REGION_WIDTH = MFB_REGION_SIZE*MFB_BLOCK_SIZE*MFB_ITEM_WIDTH;
18+
//parameter MFB_ITEM_WIDTH = 32;
19+
//parameter MFB_REGION_WIDTH = MFB_REGION_SIZE*MFB_BLOCK_SIZE*MFB_ITEM_WIDTH;
2020

21-
parameter CC_TUSER_WIDTH = 33;
22-
parameter CC_TDATA_WIDTH = MFB_REGIONS*MFB_REGION_WIDTH;
23-
parameter STRADDLING = 0;
21+
//parameter CC_TDATA_WIDTH = MFB_REGIONS*MFB_REGION_WIDTH;
22+
//parameter ITEMS = 512/32;
23+
parameter STRADDLING = 1;
2424
parameter DEVICE = "ULTRASCALE";
2525

2626
parameter CLK_PERIOD = 5ns;

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